Stage - Hybrid FeRAM/RRAM synaptic circuit for on-chip learning H/F


The Technological Research Department (DRT), who are we? More than 4,000 people committed to social issues! With its Technological Research Division (DRT), the CEA acts as an innovation gas pedal for industry in all sectors, meeting the challenges of our health, safety, information technologies and energy future. CEA Tech Corporate from CEA Tech on Vimeo. In the quest for robots capable of expressing robust cognitive behavior based on sensor information, the potential applications are vast. From farming robots adept at fruit picking to those designed for rescuing individuals from collapsed buildings, these autonomous systems represent a powerful future tool. However, there are currently significant barriers to the implementation of these autonomous systems, mainly due to the power consumption. This consumption can be drastically reduced by using hardware-computing systems with an architecture inspired by biology, employing nanodevices that mimic the properties of synapses. Learning in neural networks relies on the adaptability of synaptic connections, which can be replicated through artificial synapses utilizing memory devices. However, the requirements for these memory devices are contradictory. Learning demands iterative refinement of numerous stored values, necessitating memory devices with low programming energy and high endurance. In contrast, inference requires long-term stability and the absence of any read disturbance to process extensive data without interruptions. Currently, no memory technology can simultaneously fulfill both these requirements. In response to this challenge, we have recently proposed a novel memory that enables the integration of two technologies—resistive switching devices (RRAM) and ferroelectric memories (FeRAM)—in the same circuit. RRAMs provide non-disruptive reading operations, rendering them highly suitable for inference engines. Conversely, ferroelectric memories exhibit ultra-low programming energy and outstanding programming endurance, making them an ideal choice for learning. The proposed research project aims to prototype and functionally validate an integrated test vehicle with CMOS and the proposed hybrid memory technology. The selected candidate will be positioned at the interface between the nanofabrication and design teams. The primary responsibilities will include the electrical characterization of an already existing chip to evaluate the feasibility of implementing different learning algorithms. This requires familiarity with the basics of computational algorithmics, as well as an understanding of the physics of memory nanodevices. The work will be conducted in close collaboration with CEA-LIST, one of the world's leading advanced design research laboratories. #Neuromorphic #Nanotechnology

What do we expect from you? We are seeking applicants with a strong background in the physics of electronic components and proficiency in electrical characterization techniques. Basic knowledge in neuromorphic computing is advantageous. A genuine enthusiasm for scientific research and the ability to communicate effectively in a multidisciplinary environment will be highly valued. Join us and develop your skills and acquire new ones! Still in doubt? We can offer you : A unique research environment dedicated to ambitious projects that address today's major societal challenges. Experience at the cutting edge of innovation, with strong potential for industrial development, Exceptional experimental resources and top-quality supervision, Real career opportunities at the end of your work-study program A position in the heart of the Grenoble metropolitan area, easily accessible via the soft mobility encouraged by the CEA, A recognized work-life balance, A diversity and inclusion policy, An active CSE in terms of leisure and extra-professional activities. All our positions are open to people with disabilities. The CEA's Mission Handicap provides you with support and makes the necessary adjustments to meet your specific needs.

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