Development and integration of technological boosters for strain engineering in advanced FDSOI channels

Job description: Fully Depleted Silicon On Insulator FDSOI CMOS technology has been demonstrated to be highly efficient for low power and low leakage applications such as mobile, internet of things or wearable. This is mainly due to the excellent electrostatic control in the transistor channel, a low variability and high application flexibility (owing to a great back-biasing capability). The work of this thesis will deal with the strain integration in FDSOI technology in order to boost and optimize the CMOS performance. Different strain introduction techniques will be evaluated, in particular the engineering of stress in the channel to enhance the carrier mobility. This strain can come directly from from the channel (SiGe channel for pMOS), from the BOX (through a BOX creep techniques), or through the source/drain.The student, with the support of the whole team, will have in charge the review of most promising solutions, first from a theoretical point of view and then with their development and implementation on morphological and electrical dedicated structures. Extensive mechanical and device simulations will be done to correlate the different results.

Your profile: M2 in microelectronics