Low temperature selective epitaxial growth of SiGe(:B) for pMOS FD-SOI transistors

Job description: As silicon technologies for microelectronics continue to evolve, processes involved in device manufacturing need to be optimized. More specifically, epitaxy, a crystal growth technique, is being used to fabricate 10 nm technological node FD-SOI (Fully Depleted-Silicon On Insulator) transistors as part of CEA-Letiapos;s NextGen project. Doped and undoped Si and SiGe semiconductor epitaxy is being developed to improve the devicesapos; electrical performances. The thesis will focus on selective SiGe(:B) epitaxy for channels and source/drains of pMOS transistors. A comparison of SiGe and SiGe:B growth kinetics will be made between growth under H2, the commonly used carrier gas, and N2. Innovative cyclic deposition/etching (CDE) strategies will also be evaluated, with the aim of lowering process temperatures.

Your profile: bac+5 (master) spécialité sciences des matériaux et/ou microélectronique