Seeking the maximal active dopant concentration in Si using nanosecond laser annealing

In conventional CMOS technology, source & drain regions of transistors are formed by ion implantation of selected impurities (B, P) in silicon or SiGe alloy, and a subsequent thermal treatment to cure the crystal and electrically activate the dopants. In the case of 3D-sequential integration, an architecture in which at least tow levels of transistors are superimposed, the thermal budget for the fabrication of the upper level transistors is limited, to avoid any degradation of the bottom level. Classical annealings during a few seconds/ minutes at 600-1050°C are not anymore possible. One can choose to switch to Nanosecond Laser Annealing (NLA), enabling very short anneals with heat confined in the first tens of nanometers thanks to its UV laser and very short pulse duration. Depending on the amount of heat provided to the Si or SiGe layer by NLA, various phenomena can be encountered. When heat amount is sufficient, the layer can melt and solidify. On the other side, when heat amount does not exceed the melt threshold, solid phase epitaxial regrowth (SPER) can take place. In both cases, the extreme cooling rate gives access to high active dopant concentration, eventually beyond the solubility limit. However, maximal achievable active dose (phosphorus and boron in silicon, boron in SiGe) are not known, for both solid and liquid regimes.