Artificial Intelligence for the Modeling and Topographic Analysis of Electronic Chips

  • Advanced nano characterization,
  • phD
  • Grenoble
  • Level 7
  • 2026-09-01
  • BALAN Viorel (DRT/DPFT)
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The inspection of wafer surfaces is critical in microelectronics to detect defects affecting chip quality. Traditional methods, based on physical models, are limited in accuracy and computational efficiency. This thesis proposes using artificial intelligence (AI) to characterize and model wafer topography, leveraging optical interferometry techniques and advanced AI models. The goal is to develop AI algorithms capable of predicting topographical defects (erosion, dishing) with high precision, using architectures such as convolutional neural networks (CNN), generative models, or hybrid approaches. The work will include optimizing models for fast inference and robust generalization while reducing manufacturing costs. This project aligns with efforts to improve microfabrication processes, with potential applications in the semiconductor industry. The expected results will contribute to a better understanding of surface defects and the optimization of production processes.

bac +5 en programmation Python, et analyse dapos;images

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