During this internship, the candidate will evaluate existing protected software implementations of Dilithium and will propose secure and efficient hardware blocks to accelerate its main bottlenecks. The trainee's tasks will be to: - Analyze software implementations of Dilithium with countermeasures against physical attacks - Analyze state-of-the-art secure hardware implementations of Dilithium - Design at RTL level secure hardware accelerators for Dilithium - Integrate the hardware accelerators on System-on-Chips based on RISC-V microcontrollers - Implement the system on FPGA - Perform leakage assessment of the designed blocks